Huawei has recently unveiled its new trifold, the Mate XT 2, which introduces the new processor Kirin 9050 Pro, capable of delivering overall performance 42% higher than the previous model.
This launch represents a highly significant event, marking the return of a completely new Kirin chip on a flagship product six years after the global release of the Mate 40.
Huawei presents a new top-of-the-line chip, it’s 42% faster
The main reason behind this dizzying power increase lies in the adoption of the so-called logic folding technology. According to the Xinhua News Agency, the Kirin 9050 Pro is the first high-performance processor to commercially use this complex solution.
Instead of placing the logic units on a traditional horizontal grid, the chip organizes them into stacked layers. This approach is often likened to the real estate evolution that turns a single-story apartment into a two-story dwelling.
To effectively connect these stacked layers, Huawei has integrated vertical interconnection channels that work exactly like data elevators. This ingenious arrangement drastically reduces the length of signal transmission paths, reducing latency and guaranteeing much faster calculations.
As a result, transistor density jumped from around 155 million to as high as 238 million per square millimeter. This 55% increase over the previous generation represents a formidable achievement, also confirmed by data released by the People’s Daily.
Energy efficiency and new scalability rules
Despite the massive increase in density and computing speed, the company managed to drastically reduce the energy requirements of the component. At the same performance, tests indicate a drastic drop in energy consumption of 66% for the NPU, 58% for the GPU, and 41% for the high-performance cores of the CPU.
These efficiency parameters find theoretical grounding in recent studies published by the company’s leadership. On September 4, He Tingbo, head of the semiconductor division, disclosed a scientific paper relating to the Tau Scalability Law.
The text presents measurements taken on the Kirin 2026 chip, clearly illustrating how the increase in transistor density can occur in parallel with a marked reduction in power consumption for the main compute units.
The perfect alignment between all these novelties and code optimization allows the new foldable smartphone to handle complex workloads without compromising autonomy.
